Single event effects qualificatoin of integrated circuits

Analysis of Single-Event Transients in Analog Circuits

A new methodology for understanding single-event transient (SET) phenomena in analog circuits is described. Device and circuit simulation techniques are coupled in order to reproduce experimental data obtained from the National Semiconductor LM124 operational amplifier and to determine the most sensitive parts of the integrated circuit. Experimental data obtained at the Physical Nuclear Institu...

Integrated circuits and logic operations based on single-layer MoS2.

Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS(2) represent the ultimate limit of miniaturization in the vert...

Single Mode 3D Diffusive Photopolymer Optics for Optical Integrated Circuits

We demonstrate single mode three-dimensional optics fabricated via direct-write lithography in diffusive photopolymers, including uniform waveguides, symmetrical waveguide tapers, 90 OCIS codes: sharp waveguide bends and waveguides through thin hybrid subcomponents. (130.3120) Integrated optics devices; (230.7370) Waveguides; (140.3450) Laser-induced chemistry.

Integrated Circuits

System Effects of Single Event Upsets

At the system level, SEUs in processors are controlled by fault-tolerance techniques such as replication and voting, watchdog processors, and tagged data schemes [13,16,30]. SEUs in memory subsystems are controlled by use of error control codes (ECCs) [4,17,21] and a process called scrubbing. The scrubbing process periodically reads each word in the memory. If the number of faulty digits in a w...